Validation of Communications Systems with SDL provides a clear practical guide to validating, by simulation, a telecom system modelled in SDL. SDL, the Specification and Description Language standardised by the International Telecommunication Union (ITU-T), is used to specify and develop complex systems such as GSM, GPRS, UMTS, IEEE 802.11 or Hiperlan. Since the downturn in the telecom industry, validating a system before its implementation has become mandatory to reduce costs. This volume guides you step by step through the validation of a simplified protocol layer, from interactive simulation to proof of properties using reachability analysis combined with observers. Every step is explained, using the two main SDL tools commercially available: ObjectGeodeTM and Tau SDLTM Suite, both from Telelogic. Contents: Short tutorial on SDL Presentation of the protocol layer case study Interactive simulation, MSC generation Scripting, automatic non-regression Auto matic validation against MSC, HMSC, etc. Random simulation Exhaustive and bit-state simulation Errors detected and not detected by simulation Other simulator features This book offers you the opportunity to: Learn expert validation techniques and tips Master advanced simulation features of Telelogic ObjectGeodeTM and Tau SDL SuiteTM Practice 156 hands-on exercises with solutions. The SDL models and scripts used in the exercises can be downloaded from the Web.

This volume presents the latest research worldwide on communications protocols, emphasizing specification and compliance testing. It presents the complete proceedings of the fifteenth meeting on `Protocol Specification, Testing and Verification' arranged by the International Federation for Information Processing.

Communication protocols are rules whereby meaningful communication can be exchanged between different communicating entities. In general, they are complex and difficult to design and implement. Specifications of communication protocols written in a natural language (e.g. English) can be unclear or ambiguous, and may be subject to different interpretations. As a result, independent implementations of the same protocol may be incompatible. In addition, the complexity of protocols make them very hard to analyze in an informal way. There is, therefore, a need for precise and unambiguous specification using some formal languages. Many protocol implementations used in the field have almost suffered from failures, such as deadlocks. When the conditions in which the protocols work correctly have been changed, there has been no general method available for determining how they will work under the new conditions. It is necessary for protocol designers to have techniques and tools to detect errors in the early phase of design, because the later in the process that a fault is discovered, the greater the cost of rectifying it. Protocol verification is a process of checking whether the interactions of protocol entities, according to the protocol specification, do indeed satisfy certain properties or conditions which may be either general (e.g., absence of deadlock) or specific to the particular protocol system directly derived from the specification. In the 80s, an ISO (International Organization for Standardization) working group began a programme of work to develop formal languages which were suitable for Open Systems Interconnection (OSI). This group called such languages Formal Description Techniques (FDTs). Some of the objectives of ISO in developing FDTs were: enabling unambiguous, clear and precise descriptions of OSI protocol standards to be written, and allowing such specifications to be verified for correctness. There are two FDTs standardized by ISO: LOTOS and Estelle. Communication Protocol Specification and Verification is written to address the two issues discussed above: the needs to specify a protocol using an FDT and to verify its correctness in order to uncover specification errors in the early stage of a protocol development process. The readership primarily consists of advanced undergraduate students, postgraduate students, communication software developers, telecommunication engineers, EDP managers, researchers and software engineers. It is intended as an advanced undergraduate or postgraduate textbook, and a reference for communication protocol professionals.

Considered a standard industry resource, the Embedded Systems Handbook provided researchers and technicians with the authoritative information needed to launch a wealth of diverse applications, including those in automotive electronics, industrial automated systems, and building automation and control. Now a new resource is required to report on current developments and provide a technical reference for those looking to move the field forward yet again. Divided into two volumes to accommodate this growth, the Embedded Systems Handbook, Second Edition presents a comprehensive view on this area of computer engineering with a currently appropriate emphasis on developments in networking and applications. Those experts directly involved in the creation and evolution of the ideas and technologies presented offer tutorials, research surveys, and technology overviews that explore cutting-edge developments and deployments and identify potential trends. This first self-contained volume of the handbook, Embedded Systems Design and Verification, is divided into three sections. It begins with a brief introduction to embedded systems design and verification. It then provides a comprehensive overview of embedded processors and various aspects of system-on-chip and FPGA, as well as solutions to design challenges. The final section explores power-aware embedded computing, design issues specific to secure embedded systems, and web services for embedded devices. Those interested in taking their work with embedded systems to the network level should complete their study with the second volume: Network Embedded Systems.

Co-Design is the set of emerging techniques which allows for the simultaneous design of Hardware and Software. In many cases where the application is very demanding in terms of various performances (time, surface, power consumption), trade-offs between dedicated hardware and dedicated software are becoming increasingly difficult to decide upon in the early stages of a design. Verification techniques - such as simulation or proof techniques - that have proven necessary in the hardware design must be dramatically adapted to the simultaneous verification of Software and Hardware. Describing the latest tools available for both Co-Design and Co-Verification of systems, Hardware/Software Co-Design and Co-Verification offers a complete look at this evolving set of procedures for CAD environments. The book considers all trade-offs that have to be made when co-designing a system. Several models are presented for determining the optimum solution to any co-design problem, including partitioning, architecture synthesis and code generation. When deciding on trade-offs, one of the main factors to be considered is the flow of communication, especially to and from the outside world. This involves the modeling of communication protocols. An approach to the synthesis of interface circuits in the context of co-design is presented. Other chapters present a co-design oriented flexible component data-base and retrieval methods; a case study of an ethernet bridge, designed using LOTOS and co-design methodologies and finally a programmable user interface based on monitors. Hardware/Software Co-Design and Co-Verification will help designers and researchers to understand these latest techniques in system design and as such will be of interest to all involved in embedded system design.

This book constitutes the refereed proceedings of the 13th International SDL Forum, SDL 2007, held in Paris, France. The 17 revised full papers presented were carefully reviewed and selected for inclusion in the book. The papers are organized in topical sections on model driven engineering, testing, language extensions, implementation and modeling experience and extensions—-addressing all aspects of systems design and system design languages.

The primary aim of this monograph is to present the current research efforts that have gone into/or going on in the systematic design of real-time programs. Such an effort would help researchers and users in the area to get a clear picture of the issues of specification, verification and design of real-time reactive programs. It will clearly enable us to identify languages that can be used for different kinds of applications. Obviously, in an upcoming area like this, this presentation is far from complete.The quintessence of the monograph can be captured by the following question:How can we design and develop Robust Reactive (real-time) Programs?We address this question in this monograph through the various underlying issues listed, such as characteristics of real-time/reactive programs, reactive programming languages, verification and refinements.