*Covers design, packaging, construction, assembly, and application of all three approaches to Area Array Packaging: Ball Grid Array (BGA), Chip Scale Package (CSP), and Flip Chip (FC) *Details the pros and cons of each technology with varying applications *Examines packaging ramifications of high density interconnects (HDI)

This engineering reference covers the most important assembly processes in modern electronic packaging. It includes flip chip assembly and processes, die-attach, and BGA and CSP rework.

This engineering reference covers new techniques in electronic packaging - flip chip, BGA, and MEMs. It includes high density packaging and cleaning options.

Microelectronic packaging has been recognized as an important "enabler" for the solid state revolution in electronics which we have witnessed in the last third of the twentieth century. Packaging has provided the necessary external wiring and interconnection capability for transistors and integrated circuits while they have gone through their own spectacular revolution from discrete device to gigascale integration. At IBM we are proud to have created the initial, simple concept of flip chip with solder bump connections at a time when a better way was needed to boost the reliability and improve the manufacturability of semiconductors. The basic design which was chosen for SLT (Solid Logic Technology) in the 1960s was easily extended to integrated circuits in the '70s and VLSI in the '80s and '90s. Three I/O bumps have grown to 3000 with even more anticipated for the future. The package families have evolved from thick-film (SLT) to thin-film (metallized ceramic) to co-fired multi-layer ceramic. A later family or ceramics with matching expansivity to sili con and copper internal wiring was developed as a predecessor of the chip interconnection revolution in copper, multilevel, submicron wiring. Powerful server packages have been de veloped in which the combined chip and package copper wiring exceeds a kilometer. All of this was achieved with the constant objective of minimizing circuit delays through short, efficient interconnects.

This engineering reference covers the most important assembly processes in modern electronic packaging.

This thoroughly revised and updated three volume set continues to be the standard reference in the field, providing the latest in microelectronics design methods, modeling tools, simulation techniques, and manufacturing procedures. Unlike reference books that focus only on a few aspects of microelectronics packaging, these outstanding volumes discuss state-of-the-art packages that meet the power, cooling, protection, and interconnection requirements of increasingly dense and fast microcircuitry. Providing an excellent balance of theory and practical applications, this dynamic compilation features step-by-step examples and vital technical data, simplifying each phase of package design and production. In addition, the volumes contain over 2000 references, 900 figures, and 250 tables. Part I: Technology Drivers covers the driving force of microelectronics packaging - electrical, thermal, and reliability. It introduces the technology developer to aspects of manufacturing that must be considered during product development. Part II: Semiconductor Packaging discusses the interconnection of the IC chip to the first level of packaging and all first level packages. Electrical test, sealing, and encapsulation technologies are also covered in detail. Part III: Subsystem Packaging explores board level packaging as well as connectors, cables, and optical packaging.

Electronics has become the largest industry, surpassing agriculture, auto, and heavy metal industries. It has become the industry of choice for a country to prosper, already having given rise to the phenomenal prosperity of Japan, Korea, Singapore, Hong Kong, and Ireland among others. At the current growth rate, total worldwide semiconductor sales will reach $300B by the year 2000. The key electronic technologies responsible for the growth of the industry include semiconductors, the packaging of semiconductors for systems use in auto, telecom, computer, consumer, aerospace, and medical industries, displays, magnetic, and optical storage as well as software and system technologies. There has been a paradigm shift, however, in these technologies, from mainframe and supercomputer applications at any cost, to consumer applications at approximately one-tenth the cost and size. Personal computers are a good example, going from $500IMIP when products were first introduced in 1981, to a projected $IIMIP within 10 years. Thin, light portable, user friendly and very low-cost are, therefore, the attributes of tomorrow's computing and communications systems. Electronic packaging is defined as interconnection, powering, cool ing, and protecting semiconductor chips for reliable systems. It is a key enabling technology achieving the requirements for reducing the size and cost at the system and product level.