Held in Guam in November of 2002, the symposium on the test technologies and research issues related to silicon chip production, resulted in the 74 papers presented here. The papers are organized into sections related to the symposium sessions on test generation, on-line testing, analog and mixed si

This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing.

This book describes efficient techniques for production testing as well as for periodic maintenance testing (specifically in terms of multi-cell faults) in modern semiconductor memory. The author discusses background selection and address reordering algorithms in multi-run transparent march testing processes. Formal methods for multi-run test generation and many solutions to increase their efficiency are described in detail. All methods presented ideas are verified by both analytical investigations and numerical simulations. Provides the first book related exclusively to the problem of multi-cell fault detection by multi-run tests in memory testing process; Presents practical algorithms for design and implementation of efficient multi-run tests; Demonstrates methods verified by analytical and experimental investigations.

The Asian Test Symposium provides an international forum for engineers and researchers from all countries of the World, especially from Asia, to present and discuss various aspects of system, board and device testing with design, manufacturing and field considerations in mind. ATS 2003's papers shares state-of-the-art ideas and technologies in testing.

The idea of evolving machines, whose origins can be traced to the cybernetics movementofthe1940sand1950s,hasrecentlyresurgedintheformofthenascent ?eld of bio-inspired systems and evolvable hardware. The inaugural workshop, Towards Evolvable Hardware, took place in Lausanne in October 1995, followed by the First International Conference on Evolvable Systems: From Biology to Hardware (ICES), held in Tsukuba, Japan in October 1996. The second ICES conference was held in Lausanne in September 1998, with the third and fourth being held in Edinburgh, April 2000 and Tokyo, October 2001 respectively. This has become the leading conference in the ?eld of evolvable systems and the 2003 conference promised to be at least as good as, if not better than, the four that preceeded it. The ?fth international conference was built on the success of its predec- sors, aiming at presenting the latest developments in the ?eld. In addition, it brought together researchers who use biologically inspired concepts to imp- ment real systems in arti?cial intelligence, arti?cial life, robotics, VLSI design and related domains. We would say that this ?fth conference followed on from the previous four in that it consisted of a number of high-quality interesting thought-provoking papers.